1). Field of the Invention
The present invention relates to a method of patterning a layer which is utilized for forming a gate electrode of a metal-oxide-semiconductor (MOS) transistor, a method of forming a transistor, and a transistor which may be manufactured according to the method.
2). Discussion of Related Art
Electronic circuits are often manufactured as integrated circuits in and on semiconductor wafers. An integrated circuit comprises many interconnected electronic components, such as transistors, diodes, capacitors and other devices, which are manufactured in and on the semiconductor wafer. FIG. 1 of the accompanying drawings illustrates two conventional metal-oxide-semiconductor (MOS) transistors 110 which are manufactured in and on a semiconductor substrate 112. Each transistor 110 includes a gate oxide layer 114 and a gate electrode 116, typically of the polysilicon, on the gate oxide layer 114. Spacers 118 are usually formed on opposing sides of the gate electrode 116 The substrate 112 is generally P or N doped silicon. The substrate includes source and drain regions 120 which are of opposite doping to the rest of the substrate 112. The source and drain regions 120 are usually manufactured by ion implantation of dopants respectively after the gate electrode and after the spacers 118 are formed. The source and drain regions 120 are thus spaced from one another by a distance which depends on the width, or gate length 122 of the gate electrode 116 Silicide regions 124 are formed on the source and drain regions 120 by reacting metal with the material of the source and drain regions 120.
In order to increase the speed with which the transistor 110 operates, or "switches", it may be necessary to reduce the distance by which the source and drain regions 120 are spaced from one another, i.e. to reduce the gate length 122. However, dopants oftentimes tend to outdiffuse from the source and drain regions 120. Outdiffusion is undesirable since it could cause leaking of the transistor 110. In order to reduce the gate length 122 and still prevent outdiffusion of dopants from the source and drain regions 120, it may be necessary to increase the concentration of dopants of the substrate 112.
An increase in dopant concentration of the substrate 112 results in a higher threshold voltage (the voltage which is applied to the gate electrode which causes the transistor 110 to switch) of the transistor 110. In order to reduce the threshold voltage of the transistor 110, it may be necessary to reduce the thickness of the gate oxide layer 114. A reduction in the thickness of the gate oxide layer 114 may be difficult to obtain for reasons which are now discussed with reference to FIGS. 2a to 2c.
In addition, a thinner gate oxide will give higher gate capacitance which, in turn, will provide a higher transistor drive current.
FIG. 2a illustrates a substrate 222 with a gate oxide layer 224 and a polysilicon layer 226 formed thereon. A photoresist layer 228 is formed on the polysilicon layer 226. The photoresist layer 228 consists primarily of carbon. The photoresist layer 228 is then patterned as illustrated in FIG. 2b so that portions 230 thereof remain which are dimensioned according to the size of a required gate electrode. With the portions 230 acting as a mask, the polysilicon layer 226 is then etched away as illustrated in FIG. 2c.
Carbon of the polysilicon portions 230 reacts with the material of the gate oxide layer 224, forming carbon monoxide and breakup of or breakthrough through the gate oxide layer 224. Breakthrough through gate oxide layer particularly becomes a problem when gate oxide layers have thicknesses less than 10 .ANG., and results in a roughened surface on the substrate 222. A roughened surface on the substrate 222 may result in defective silicide regions being formed thereon. Defective silicide regions will cause high parasitic resistance in the eventually fabricated transistor which will degrade transistor drive current performance, or other defects such as leakage of the eventually fabricated transistor.